Oferta laboral de Synopsys

25 de Octubre, 2011

R&D Engineer (CD)

Ingeniería Civil Eléctrica
Ingeniería Civil en Computación
Matemáticos
Físicos

Employee will engage in R&D effort (designing, developing, troubleshooting or debugging software programs) for custom analog integrated circuit design. Primary areas of focus will be integrating Physical Verification (PV) tools like Hercules and IC Validator as well as integrating Parasitic Extraction (PE) tools like StarRC into Custom Designer, Synopsys’ Custom Analog Design Platform. Employee is expected to craft user interfaces and scripting interfaces to layout and schematic editors in Custom Designer while improving flows to make IC designers more productive. Expected to analyze project areas, refine problem descriptions, develop novel technical solutions, and write papers for technical conferences and customers in the PV and PE areas. Exercise judgment within generally defined practices and policies in selecting methods and techniques for obtaining solutions while produce consistently high quality technical solutions and code implementations independently. Work with other product teams and other tool vendors to develop solutions.

Responsibilities include writing functional and design specifications, designing and developing the software, integration and unit testing, and working with cross functional teams such as other R&D and QA groups. Employee will also lead the Custom Designer team in Chile



Minimum Requirements

- BS in Computer Science / Electronics or equivalent

- Software engineering background

- Experience in C/C++ (Java/C#) programming

- Software development and debugging experience in Unix/Linux environment

- 5 - 7 years of experience developing large scale software applications and leading complex software development projects

- Analytical and problem solving skills

- Good teamwork skills

- Good communication skills in English



Preferred Requirements

- MS in Computer Science / Electronics or equivalent

- Knowledge in software development processes

- Prior knowledge in Physical Verification, Parasitic Extraction or experience of CAD tool development

- Experience with circuit simulators like HSPICE, IC layout and schematic capture

- Experience working with geographical dispersed teams

Enviar CV en inglés a jobs-chile@synopsys.com